Renesas SH7781 - Manual (Page 1611)

32. Electrical Characteristics
Rev.1.00 Jan. 10, 2008 Page 1581 of 1658
REJ09B0261-0100
D31 to D0
(Read)
(SA: IO ← memory)
Legend:
IO: DACK
device
SA: Single-address DMA transfer
DA: Dual-address DMA transfer
Note: DACK is configured as active-high.
A25 to A5
A4 to A0
T1 TB2
t
CSD
t
RWD
t
BSD
t
RDS
t
BSD
t
RSD
t
AD
TS1
t
DACD
TB1 TB2
t
AD
t
RDH
t
DACD
t
DACD
TB1 TB2 T2 TB1
t
AD
t
CSD
t
RWD
t
RDH
t
RSD
t
RDS
TH1 TS1 TH1 TS1 TH1 TS1 TH1
CLKOUT
DACKn
(DA)
DACKn
CSn
RD/ WR
RD
BS
RDY
t
DACD
t
DACD
Figure 32.15 Burst ROM Bus Cycle (CSnWCR.IW = 0000, CSnWCR.RDS = 001,
CSnWCR.WTS = 001, CSnWCR.RDH = 001, CSnWCR.WTH = 001)