Renesas SH7781 - Manual (Page 742)

14. Direct Memory Access Controller (DMAC)
Rev.1.00 Jan. 10, 2008 Page 712 of 1658
REJ09B0261-0100
Transfer
source address
Transfer
destination address
CLKOUT
A25 to A0
CSn
RD
WEn
D31 to D0
DACKn
(Active-low)
Figure 14.5 Example of DMA Transfer Timing in Dual Address Mode
(Source: SRAM, Destination: DDR-SDRAM)