Renesas SH7781 - Manual (Page 1051)

20. Graphics Data Translation Accelerator (GDTA)
Rev.1.00 Jan. 10, 2008 Page 1021 of 1658
REJ09B0261-0100
Table 20.9 shows estimated image generation sequence shown in figure 20.6.
No. in the table corresponds to the number used in figure 20.6.
Table 20.9 Estimated Image Generation Sequence
No. Operation Description
(1) Calculation of
output position
(first row)
The following formulae are used to compute output position (first row) (DDR2-
SDRAM output address).
First row output address formulae
• Y output target address
Calculation formula: Output frame Y point value (base point) + [mbrow
Ч
16
Ч (width + Y padding)] + [mbcol × 16]
Output frame Y pointer value (base point): MCOYPR setting address
mbrow: Calculated from MCCF setting
mbcol: Calculated from MCCF setting
width: Calculated from MCWR setting
Y padding: Calculated from MCYPR setting
Subsequently, data for 16 dots (= 16 bytes) is processed in succession
• U/V output target address
Calculation formula: Output frame U point value (base point) + [mbrow
Ч 8
Ч (width/2 + U padding)] + [mbcol × 8]
Output frame U pointer value (base point): MCOUPR setting address
mbrow: Calculated from MCCF setting
mbcol: Calculated from MCCF setting
width: Calculated from MCWR setting
U padding: Calculated from MCUVPR setting
Subsequently, data for 8 dots (= 8 bytes) is processed in succession
V pointer address is calculated using a formula similar to that for the U pointer
address.