5 physical memory address map – Renesas SH7781 User Manual
Page 54
1. Overview
Rev.1.00 Jan. 10, 2008 Page 24 of 1658
REJ09B0261-0100
1.5
Physical Memory Address Map
The SH7785 supports 32-bit virtual address space, and supports both 29-bit and 32-bit physical
address spaces. For details of mappings from the virtual address space to the physical address
spaces, see section 7, Memory Management Unit (MMU).
Figure 1.4 shows the relationship between the AREASEL bits and the physical memory address
map. The 32-bit physical address space corresponds with the address space of the SuperHyway
bus.
MMSELR
AREASEL[2:0]*
B'000 B'001 B'010 B'011 B'100 B'101 B'110
Area 0
LBSC LBSC LBSC LBSC LBSC LBSC LBSC
Area
1
LBSC LBSC LBSC LBSC LBSC LBSC LBSC
Area 2
LBSC
LBSC
DBSC2
DBSC2
DBSC2
LBSC
LBSC
Area 3
DBSC3
DBSC3
DBSC3
DBSC3
DBSC3
LBSC
LBSC
Area
4
LBSC PCIC LBSC PCIC DBSC4
LBSC PCIC
Area 5
LBSC
LBSC
LBSC
LBSC
DBSC5
LBSC
LBSC
Area
6
LBSC LBSC LBSC LBSC LBSC LBSC LBSC
Area 7
(Reserved)
(Undefined)
DBSC0 DBSC0 DBSC0 DBSC0 DBSC0 DBSC0 DBSC0
DBSC1
DBSC1
DBSC1
DBSC1
DBSC1
DBSC1
DBSC1
DBSC2
DBSC2
DBSC2
DBSC2
DBSC2
DBSC2
DBSC2
DBSC3
DBSC3
DBSC3
DBSC3
DBSC3
DBSC3
DBSC3
DBSC4
DBSC4
DBSC4
DBSC4
DBSC4
DBSC4
DBSC4
DBSC5
DBSC5
DBSC5
DBSC5
DBSC5
DBSC5
DBSC5
DBSC6
DBSC6
DBSC6
DBSC6
DBSC6
DBSC6
DBSC6
DBSC7
DBSC7
DBSC7
DBSC7
DBSC7
DBSC7
DBSC7
DBSC8
DBSC8
DBSC8
DBSC8
DBSC8
DBSC8
DBSC8
DBSC9
DBSC9
DBSC9
DBSC9
DBSC9
DBSC9
DBSC9
DBSC10
DBSC10
DBSC10
DBSC10
DBSC10
DBSC10
DBSC10
DBSC11
DBSC11
DBSC11
DBSC11
DBSC11
DBSC11
DBSC11
DBSC12
DBSC12
DBSC12
DBSC12
DBSC12
DBSC12
DBSC12
DBSC13
DBSC13
DBSC13
DBSC13
DBSC13
DBSC13
DBSC13
DBSC14
DBSC14
DBSC14
DBSC14
DBSC14
DBSC14
DBSC14
DDR-SDRAM
DBSC15
DBSC15
DBSC15
DBSC15
DBSC15
DBSC15
DBSC15
(undefined)
PCI
(PCIC)
PCIC PCIC PCIC PCIC PCIC PCIC PCIC
(Internal resource)
H'0000 0000
H'0400 0000
H'0800 0000
H'0C00 0000
H'1000 0000
H'1400 0000
H'1800 0000
H'1C00 0000
H'2000 0000
H'4000 0000
H'4400 0000
H'4800 0000
H'4C00 0000
H'5000 0000
H'5400 0000
H'5800 0000
H'5C00 0000
H'6000 0000
H'6400 0000
H'6800 0000
H'6C00 0000
H'7000 0000
H'7400 0000
H'7800 0000
H'7C00 0000
H'8000 0000
H'C000 0000
H'E000 0000
H'FFFF FFFF
Note: Memory Address Map Select Register (MMSELR) Area Select Bit (AREASEL)
For details, refer to section 11.4.1, Memory Address Map Select Register (MMSELR).
32-bit physical
address space
(extended mode)
29-bit physical
address space
Figure 1.4 Relationship between AREASEL Bits and Physical Memory Address Map