18 port b data register (pbdr) – Renesas SH7781 User Manual

Page 1449

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28. General Purpose I/O Ports (GPIO)

Rev.1.00 Jan. 10, 2008 Page 1419 of 1658

REJ09B0261-0100

28.2.18

Port B Data Register (PBDR)

PBDR is an 8-bit readable/writable register that stores port B data.

0

1

2

3

4

5

6

7

0

0

0

0

0

0

0

0

PB0DT

PB1DT

PB2DT

PB3DT

PB4DT

PB5DT

PB6DT

PB7DT

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Bit:

Initial value:

R/W:

Bit Bit

Name

Initial
Value R/W Description

7 PB7DT

0* R/W

6 PB6DT

0* R/W

5 PB5DT

0* R/W

4 PB4DT

0* R/W

3 PB3DT

0* R/W

2 PB2DT

0* R/W

These bits store output data of a pin which is used as a
general-purpose output port. When the pin functions as
a general-purpose output port, reading the port will read
out the value of the corresponding bit of this register.

When the pin functions as a general-purpose input port,
reading the port will read out the status of the
corresponding pin.

1 PB1DT

0 R/W

0 PB0DT

0 R/W

Note: * When the bus mode is set to DU via the bus mode pins (MODE11 and MODE12), the

pin is initially used as a general-purpose input, and the pin status is read from this
register.

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