Renesas SH7781 - Manual (Page 348)

10. Interrupt Controller (INTC)
Rev.1.00 Jan. 10, 2008 Page 318 of 1658
REJ09B0261-0100
(4) INT2B3: Detailed Interrupt Sources for the PCIC
Module Bit Name Detailed Source Description
PCIC 31 to 10
⎯ Reserved
These bits are read as
0 and cannot be
modified.
9 PCIPWD0 PCIC power state D0
state interrupt
8 PCIPWD1 PCIC power state D1
state interrupt
7 PCIPWD2 PCIC power state D2
state interrupt
PCIC interrupt sources are indicated.
This register indicates the PCIC
interrupt sources even if the mask
setting for PCIC is made in the
interrupt mask register.
6 PCIPWD3 PCIC power state D3
state interrupt
5 PCIERR PCIC error interrupt
4 PCIINTD PCIC INTD interrupt
3 PCIINTC PCIC INTC interrupt
2 PCIINTB PCIC INTB interrupt
1 PCIINTA PCIC INTA interrupt
0 PCISERR PCIC SERR interrupt