Figure 32.59 hac warm reset timing, Figure 32.60 hac clock input timing, Figure 32.61 hac interface module signal timing – Renesas SH7781 User Manual
Page 1645
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32. Electrical Characteristics
Rev.1.00 Jan. 10, 2008 Page 1615 of 1658
REJ09B0261-0100
HACn_SYNC
HACn_BITCLK
t
SYN_HIGH
Figure 32.59 HAC Warm Reset Timing
HACn_BITCLK
t
ICL_HIGH
t
ICL_LOW
Figure 32.60 HAC Clock Input Timing
HACn_BITCLK
HACn_SDIN
HACn_SDOUT
t
SDNHD
t
SDNSU
t
SDCUTD
t
SYNCD1
t
SYNCD2
HACn_SYNC
Figure 32.61 HAC Interface Module Signal Timing
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