Renesas SH7781 - Manual (Page 506)

12. DDR2-SDRAM Interface (DBSC2)
Rev.1.00 Jan. 10, 2008 Page 476 of 1658
REJ09B0261-0100
Access Size Address MDQ15 to MDQ8 MDQ7 to MDQ0
Longword Address 0
(First access:
Address 0)
Data
31 to 24
Data
23 to 16
Address 0
(Second access:
Address 2)
Data
15 to 8
Data
7 to 0
Address 4
(First access:
Address 4)
Data
31 to 24
Data
23 to 16
Address 4
(Second access:
Address 6)
Data
15 to 8
Data
7 to 0
Quadword Address 0
(First access:
Address 0)
Data
63 to 56
Data
55 to 48
Address 0
(Second access:
Address 2)
Data
47 to 40
Data
39 to 32
Address 0
(Third access:
Address 4)
Data
31 to 24
Data
23 to 16
Address 0
(Fourth access:
Address 6)
Data
15 to 8
Data
7 to 0