Renesas SH7781 - Manual (Page 885)

19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 855 of 1658
REJ09B0261-0100
Bit Bit Name
Initial
Value R/W Internal
Update Description
31 to 16
⎯ All
0 R
⎯ Reserved
These bits are always read as 0. The write value
should always be 0.
15 TVE 0 R/W None TV Synchronous Signal Error Interrupt Enable
0: Disables interrupt by the TVR flag in DSSR
1: Enables interrupt by the TVR flag in DSSR
14 FRE 0 R/W None Flame Flag Interrupt Enable
0: Disables interrupt by the FRM flag in DSSR
1: Enables interrupt by the FRM flag in DSSR
13, 12
⎯ All
0 R
⎯ Reserved
These bits are always read as 0. The write value
should always be 0.
11 VBE 0 R/W None Vertical Blanking Flag Interrupt Enable
0: Disables interrupt by the VBK flag in DSSR
1: Enables interrupt by the VBK flag in DSSR
10
⎯ 0
R
⎯ Reserved
This bit is always read as 0. The write value
should always be 0.
9 RIE 0 R/W None Vertical Blanking Flag Interrupt Enable
0: Disables interrupt by the RINT flag in DSSR
1: Enables interrupt by the RINT flag in DSSR
8 HBE 0 R/W None Vertical Blanking Flag Interrupt Enable
0: Disables interrupt by the HBK flag in DSSR
1: Enables interrupt by the HBK flag in DSSR
7 to 0
⎯ All
0 R
⎯ Reserved
These bits are always read as 0. The write value
should always be 0.