Renesas SH7781 - Manual (Page 1432)

28. General Purpose I/O Ports (GPIO)
Rev.1.00 Jan. 10, 2008 Page 1402 of 1658
REJ09B0261-0100
Bit Bit Name
Initial
value R/W Description
7
6
PH3MD1
PH3MD0
1
1
R/W
R/W
PH3 Mode
00: SCIF[0]/HSPI/FLCTL module
(
SCIF0_RTS/HSPI_CS/FSE)*
01: Port output
10: Port input (pull-up MOS: Off)
11: Port input (pull-up MOS: On)
5
4
PH2MD1
PH2MD0
1
1
R/W
R/W
PH2 Mode
00: SCIF[0]/HSPI/FLCTL module
(SCIF0_SCK/HSPI_CLK/
FRE)*
01: Port output
10: Port input (pull-up MOS: Off)
11: Port input (pull-up MOS: On)
3
2
PH1MD1
PH1MD0
1
1
R/W
R/W
PH1 Mode
00: SCIF[0]/HSPI/FLCTL module
(SCIF0_RXD/HSPI_RX/
FRB)*
01: Port output
10: Port input (pull-up MOS: Off)
11: Port input (pull-up MOS: On)
1
0
PH0MD1
PH0MD0
1
1
R/W
R/W
PH0 Mode
00: SCIF[0]/HSPI/FLCTL module
(SCIF0_TXD/HSPI_TX/
FWE)*
01: Port output
10: Port input (pull-up MOS: Off)
11: Port input (pull-up MOS: On)
Note: * The module that uses this pin can be selected by the peripheral module select register
1 (P1MSELR).