Renesas SH7781 - Manual (Page 1373)

27. NAND Flash Memory Controller (FLCTL)
Rev.1.00 Jan. 10, 2008 Page 1343 of 1658
REJ09B0261-0100
Table 27.3 Register States in Each Processing Mode
Register Abbreviation Power-On Reset Manual Reset Sleep/Deep Sleep Module Standby
FLCMNCR H'0000 0000 H'0000 0000 Retained Retained
FLCMDCR H'0000 0000 H'0000 0000 Retained Retained
FLCMCDR H'0000 0000 H'0000 0000 Retained Retained
FLADR H'0000 0000 H'0000 0000 Retained Retained
FLDATAR H'0000 0000 H'0000 0000 Retained Retained
FLDTCNTR H'0000 0000 H'0000 0000 Retained Retained
FLINTDMACR H'0000 0000 H'0000 0000 Retained Retained
FLBSYTMR H'0000 0000 H'0000 0000 Retained Retained
FLBSYCNT H'0000 0000 H'0000 0000 Retained Retained
FLDTFIFO Undefined Undefined Retained Retained
FLECFIFO Undefined Undefined Retained Retained
FLTRCR H'00 H'00 Retained Retained
FLADR2 H'0000 0000 H'0000 0000 Retained Retained