Renesas SH7781 - Manual (Page 1333)

26. Serial Sound Interface (SSI) Module
Rev.1.00 Jan. 10, 2008 Page 1303 of 1658
REJ09B0261-0100
Bit Bit Name
Initial
Value R/W Description
14 SWSD 0 R/W Serial WS Direction
0: Serial word select input, slave mode
1: Serial word select output, master mode
Note: In non-compressed mode (SSICR.CPEN=0), the
combination of (SCKD, SWSD) = (0, 0) or (1, 1) is
available.
13 SCKP 0 R/W Serial Bit Clock Polarity
0: SSI_WS and SSI_SDATA change on falling edge of
SSI_SCK (sampled on rising edge of SCK)
1: SSI_WS and SSI_SDATA change on rising edge of
SSI_SCK (sampled on falling edge of SCK)
SCKP = 0 SCKP = 1
SSI_SDATA input sampling
timing in receive mode
(TRMD = 0) SSI_SCK
rising edge SSI_SCK
falling edge
SSI_SDATA output change
timing in transmit mode
(TRMD = 1) SSI_SCK
falling edge SSI_SCK
rising edge
SSI_WS input sampling
timing in slave mode
(SWSD = 0) SSI_SCK
rising edge SSI_SCK
falling edge
SSI_WS output change
timing in master mode
(SWSD = 1) SSI_SCK
falling edge SSI_SCK
rising edge