20) pci interrupt pin register (pciintpin) – Renesas SH7781 User Manual
Page 611
13. PCI Controller (PCIC)
Rev.1.00 Jan. 10, 2008 Page 581 of 1658
REJ09B0261-0100
(20)
PCI Interrupt Pin Register (PCIINTPIN)
0
1
2
3
4
5
6
7
1
0
0
0
0
0
0
0
INTPIN
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
SH R/W:
R
R
R
R
R
R
R
R
PCI R/W:
Bit Bit
Name
Initial
Value R/W
Description
7 to 0
INTPIN
H'01
SH: R/W
PCI: R
Interrupt Pin Select
These bits specify which interrupt pin is used as
connection destination when the PCIC outputs
interrupt requests. The initial value is H'01.
H'00: PCI interrupt pins not used
H'01:
INTA used
H'02:
INTB used
H'03:
INTC used
H'04:
INTD used
H'05 to H'FF: Reserved
(21)
Minimum Grant Register (PCIMINGNT)
This register is not programmable.
0
1
2
3
4
5
6
7
0
0
0
0
0
0
0
0
MINGNT
R
R
R
R
R
R
R
R
Bit:
Initial value:
SH R/W:
R
R
R
R
R
R
R
R
PCI R/W:
Bit Bit
Name
Initial
Value R/W
Description
7 to 0
MINGNT
H'00
SH: R
PCI: R
Minimum Grant Specification
These bits specify the burst time required by the PCI
master device (not supported).