7 atu revision id register - aturid, Table 33. atu revision id register - aturid, 8 atu class code register - atuccr – Intel CONTROLLERS 413808 User Manual
Page 151: Table 34. atu class code register - atuccr, 33 atu revision id register - aturid, 34 atu class code register - atuccr, Address translation unit (pci-x)—intel, Bit default description, Intel, 00 xxh
Intel
®
413808 and 413812 I/O Controllers in TPER Mode
October 2007
Developer’s Manual
Order Number: 317805-001US
151
Address Translation Unit (PCI-X)—Intel
®
413808 and 413812
2.14.7
ATU Revision ID Register - ATURID
Revision ID Register bit definitions adhere to PCI Local Bus Specification, Revision 2.3.
2.14.8
ATU Class Code Register - ATUCCR
Class Code Register bit definitions adhere to PCI Local Bus Specification, Revision 2.3.
Auto configuration software reads this register to determine the PCI device function.
Table 33. ATU Revision ID Register - ATURID
Bit
Default
Description
07:00
xxH
a
a. See Intel
®
81348 I/O Processor Specification Update.
ATU Revision - identifies the revision number.
PCI
IOP
Attributes
Attributes
7
4
0
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Register Offset
+008H
Table 34. ATU Class Code Register - ATUCCR
Bit
Default
Description
23:16
05H
Base Class - Memory Controller
15:08
80H
Sub Class - Other Memory Controller
07:00
00H
Programming Interface - None defined
PCI
IOP
Attributes
Attributes
23
20
16
12
8
4
0
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Register Offset
+009H