12 uart x auto-baud control register, 12uart x auto-baud control register, 462 uart x auto-baud control register - (uxabr) – Intel CONTROLLERS 413808 User Manual

Page 687: Uarts—intel, Bit default description

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Intel

®

413808 and 413812 I/O Controllers in TPER Mode

October 2007

Developer’s Manual

Order Number: 317805-001US

687

UARTs—Intel

®

413808 and 413812

13.4.12 UART x Auto-Baud Control Register

This read/write register has no effect on the UART. It is intended as a scratchpad

register for use by programmers.

Table 462. UART x Auto-Baud Control Register - (UxABR)

Bit

Default

Description

31:4

000 0000h

Reserved

3

0

2

Auto-Baud Table (ABT): Directs the auto-baud circuitry within the UART to use a
table when selecting the final baud rate programmed into the Divisor Latch registers
and written into the Auto-Baud Count register (ACR). When a table is not used, any
value allowed in

Equation 17 on page 666

can be selected by the UART. See

Section 13.3.5, “Auto-Baud-Rate Detection” on page 666

for more information on

auto-baud.

0 = Formula used to calculate baud rates allowing all possible baud rates to be

chosen by UART

Equation 17 on page 666

.

1 = Table used to calculate baud rates which limits UART to choosing common

baud rates.

2

0

2

Auto-Baud UART Program (ABUP): Allows the UART to automatically program the
Divisor Latch registers (DLL and DLH) when the auto-baud circuit has detected the
baud rate, regardless of the state of the divisor-latch access bit (DLAB). For this to
occur, the auto-baud enable (ABE) bit must be set. Clearing this bit allows the
processor to read the Auto-Baud Count register (ACR) and determine the baud rate
using its own algorithm rather than using the UARTs.

0 = Software programs Divisor Latch Registers.
1 = UART Programs Divisor Latch Registers

1

0

2

Auto-Baud Lock Interrupt Enable (ABLIE): Enables the ABL Interrupt which
occurs when the auto-baud circuit has detected the baud rate and written the value
into the Auto-Baud Count register (ACR). The Divisor Latch registers can then be
programmed by the processor or auto-baud circuitry as dictated by the state of the
ABPP.

0 = Autobaud Lock Interrupt Disabled
1 = Autobaud Lock Interrupt Enabled

0

0

2

Auto-Baud Enable (ABE): Enables the auto-baud circuitry within the UART. The
circuitry counts the number of clocks in the start bit and writes this count into the
Autobaud Count register (ACR). It then interrupts the processor when the auto-baud
lock interrupt-enable (ABLIE)
bit is set. It also automatically programs the Divisor
Latch registers (DLL and DLH) when the auto-baud UART program (ABUP) bit is
set.

0 = Autobaud Disabled
1 = Autobaud Enabled

PC

I

IO

P

A

tt

ri

bu

te

s

A

tt

ri

bu

te

s

28

24

20

16

12

8

4

0

31

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rw

na

rw

na

rw

na

rw

na

Unit #

01

Intel XScale

®

Core internal bus address

+2328H (DLAB=x)

+2368H (DLAB=x)

Attribute Legend:

RV = Reserved

PR = Preserved

RS = Read/Set

RW = Read/Write

RC = Read Clear

RO = Read Only

NA = Not Accessible

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