Intel CONTROLLERS 413808 - Manual (Page 91)

Intel ® 413808 and 413812 I/O Controllers in TPER Mode
October 2007 Developer’s Manual
Order Number: 317805-001US 91
Address Translation Unit (PCI-X)—Intel
®
413808 and 413812
Table 16. Outbound Transaction Ordering Summary
Transaction at
Head of Queue
Question Answer Action
Outbound Write
in OWQ
Is there an Outbound Write Request
with an earlier time stamp?
Yes
Do Not Assign Token
Allow previous Transaction to Complete
No Assign Token
Outbound Read
Request in OTQ
Is there an Outbound Write with an
earlier time stamp?
Yes
Do Not Assign Token
Allow previous Transaction to Complete
No Assign Token
Is there an Outbound Read Request
with an earlier time stamp?
Yes
Do Not Assign Token
Allow previous Transaction to Complete
No Assign Token
Inbound
Configuration
Write
Completion in
IRQ
Is there an Outbound Posted Write with
an earlier time stamp?
Yes
Do Not Assign Token
Allow previous Transaction to Complete
No Assign Token
Is there an Inbound Read Completion
with an earlier time stamp?
Yes
Do Not Assign Token and allow
previous Transaction to Complete when
in PCI-X Mode.
Assign Token when in Conventional
Mode
No Assign Token
Inbound Read
Completion in
IRQ
Is there an Outbound Posted Write with
an earlier time stamp?
Yes
Do Not Assign Token
Allow previous Transaction to Complete
No Assign Token
Is there an Inbound Read Completion
with an earlier time stamp?
Yes
Do Not Assign Token and allow
previous Transaction to Complete when
in PCI-X Mode.
Assign Token when in Conventional
Mode
No Assign Token
Is there a Configuration Write
Completion with an earlier time stamp?
Yes
Do Not Assign Token and allow
previous Transaction to Complete when
in PCI-X Mode.
Assign Token when in Conventional
Mode
No Assign Token