Intel CONTROLLERS 413808 - Manual (Page 642)

Intel ® 413808 and 413812—SMBus Interface Unit
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
642 Order Number: 317805-001US
12.3 System Management Bus Interface
This interface has no configuration registers associated with it. The SMBus address is
set upon P_RST# by sampling the Peripheral Bus Interface Reset Strap inputs
A[16:13]. When the pins are sampled, the resulting 4138xx address is stored in the
Reset Strap Status Register and assigned as follows:
The SMBus controller has access to all internal registers. It can perform reads and
writes from all registers through the particular interface configuration space.
Bit Value
7 1
6 1
5 A[16]
4 0
3 A[15]
2 A[14]
1 A[13]