27 atu maximum latency register - atumlat, Table 167. atu maximum latency register - atumlat, 27atu maximum latency register - atumlat – Intel CONTROLLERS 413808 User Manual
Page 317: 167 atu maximum latency register - atumlat, This register does not apply to pci express, Address translation unit (pci express)—intel, Bit default description
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Intel
®
413808 and 413812 I/O Controllers in TPER Mode
October 2007
Developer’s Manual
Order Number: 317805-001US
317
Address Translation Unit (PCI Express)—Intel
®
413808 and 413812
3.17.27 ATU Maximum Latency Register - ATUMLAT
This register does not apply to PCI Express.
Table 167. ATU Maximum Latency Register - ATUMLAT
Bit
Default
Description
07:00
00H
This register does not apply to PCI Express.
Hard-wired to 0
PCI
IOP
Attributes
Attributes
7
4
0
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Internal Bus Address Offset
+03FH
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