Intel CONTROLLERS 413808 - Manual (Page 599)

Intel ® 413808 and 413812 I/O Controllers in TPER Mode
October 2007 Developer’s Manual
Order Number: 317805-001US 599
Interrupt Controller Unit—Intel
®
413808 and 413812
15 0
2
ATU/Start BIST Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
14 0
2
ATU-E Inbound Message Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
13 0
2
Reserved.
12 0
2
Messaging Unit Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
11 0
2
I 2 C Bus Interface 1 Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
10 0
2
I 2 C Bus Interface 0 Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
9 0
2
Timer 1 Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
8 0
2
Timer 0 Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
7 0
2
Reserved.
6 0
2
Watch Dog Timer Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
5 0
2
Reserved.
4 0
2
Reserved.
3 0
2
Reserved.
2 0
2
Reserved.
1 0
2
Reserved.
0 0
2
Reserved.
Table 395. Interrupt Steering Register 0 — INTSTR0 (Sheet 2 of 2)
Bit Default Description
Memory
Coprocessor
Attributes
Attributes
28 24 20 16 12 8 4 0 31
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Intel XScale ® processor Coprocessor
address
CP6, Page 5, Register 0