6 general call address, Figure 105. general call address, 105 general call address – Intel CONTROLLERS 413808 User Manual

Page 707: 469 general call address second byte definitions, Section 14.3.6, “general call address” on, Section 14.3.6, The i

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Intel

®

413808 and 413812 I/O Controllers in TPER Mode

October 2007

Developer’s Manual

Order Number: 317805-001US

707

I

2

C Bus Interface Units—Intel

®

413808 and 413812

14.3.6

General Call Address

The I

2

C unit supports both sending and receiving general call address transfers on the

I

2

C bus. When sending a general call message from the I

2

C unit, software must set the

General Call Disable bit in the ICR to keep the I

2

C unit from responding as a slave.

Failure to set this bit causes the I

2

C Bus to enter an indeterminate state.

A general call address is defined as a transaction with a slave address of 00H. When a

device requires the data from a general call address, it acknowledges the transaction

and stays in slave-receiver mode. Otherwise, the device can ignore the general call

address. The second and following bytes of a general call transaction are acknowledged

by every device using it on the bus. Any device not using these bytes must not Ack.

The meaning of a general call address is defined in the second byte sent by the

master-transmitter.

Figure 105

shows a general call address transaction. The least

significant bit (B) of the second byte defines the transaction.

Table 469, “General Call

Address Second Byte Definitions” on page 707

shows the valid values and definitions

when B=0.
When the 4138xx is acting as a slave, and the I

2

C unit receives a general call address

and the ICR General Call Disable bit is clear the I

2

C unit:

• Sets the ISR general call address detected bit

• Sets the ISR slave address detected bit

• Interrupts (when enabled) the 4138xx

When the I

2

C unit receives a general call address and the ICR General Call Disable bit is

set, the I

2

C unit ignores the general call address.

When directed to reset, the I

2

C Bus Interface Unit returns to its default reset condition

with the exception of the ISAR. The 4138xx is responsible for ensuring this occurs, not

the I

2

C Bus Interface Unit hardware.

When B=1, the sequence is used as a hardware general call by hardware masters only

they cannot transmit a slave address, only their own address. The I

2

C Bus Interface

Unit does not support this mode of operation.
I

2

C 10-bit addressing and CBUS compatibility are not supported.

Figure 105. General Call Address

Table 469. General Call Address Second Byte Definitions

Least Significant Bit

of Second Byte (B) Second Byte Value

Definition

0

06H

2-byte transaction where the second byte tells the slave to reset and then store

this value in the programmable part of their slave address.

0

04H

2-byte transaction where the second byte tells the slave to store this value in the

programmable part of their slave address. No reset.

0

00H

Not allowed as a second byte

Master to Slave

Slave to Master

START 00000000 ACK

Data

Byte

ACK

Data

Byte

STOP

N Bytes + ACK

Least Significant Bit of Master

Address Defines Transaction

ACK

Second Byte

Second

Byte

0 ACK

First Byte

B6295-01

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