13 vital product data, 1 configuring vital product data operation – Intel CONTROLLERS 413808 User Manual

Page 282

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Intel

®

413808 and 413812—Address Translation Unit (PCI Express)

Intel

®

413808 and 413812 I/O Controllers in TPER Mode

Developer’s Manual

October 2007

282

Order Number: 317805-001US

3.13

Vital Product Data

Vital Product Data (VPD) provides detailed information to the system regarding the

hardware, software and microcode elements of a device. This information may include

Part Number, Serial Number or other detailed information. This information resides on a

non-volatile storage device (i.e., Flash Memory) attached to the 4138xx. In addition

VPD also provides a mechanism for storing information such as performance or failure

data on the device being monitored.
Support of VPD involves the implementation of the VPD Extended Capabilities List Item

in the Primary ATU. The VPD Extended capabilities header consists of four registers, the

“VPD Capability Identifier Register - VPD_Cap_ID” on page 335

, the

“VPD Next Item

Pointer Register - VPD_Next_Item_Ptr” on page 335

, the

“VPD Address Register -

VPDAR” on page 336

, and the

“VPD Data Register - VPDDR” on page 336

.

Scheduled by Intel XScale

®

processor interrupts, the 4138xx may be used to retrieve

or store VPD information through the VPD extended capabilities list item.
Please consult Appendix I of the PCI Local Bus Specification, Revision 2.3 for the

definitions of compliant VPD format.

3.13.1

Configuring Vital Product Data Operation

By default, the 4138xx VPD functionality is not configured for operation. Specifically,

the VPD Extended Capabilities List Item are not discovered during a PCI Express Link

scan and the ATUs VPD interrupt status bit in the

“ATU Interrupt Status Register -

ATUISR” on page 329

are masked by the

“ATU Interrupt Mask Register - ATUIMR” on

page 332

. The following steps should be followed to properly configure the 4138xx’s

support for VPD:

1. The 4138xx must be strapped to Retry Type 0 Configuration cycles following the

deassertion of

P_RST#

. Enabling this configuration cycle retry mechanism insures

that the Intel XScale

®

processor can make the VPD Extended Capabilities List Item

visible before the system configures the 4138xx. The configuration retry

mechanism is controlled through bit 2 of the

“PCI Configuration and Status Register

- PCSR” on page 327

.

2. When the configuration retry mechanism is strapped enabled as described in step

1, typically, the 4138xx would also be strapped such that the Intel XScale

®

processor would immediately boot following the deassertion of

P_RST#

(bit 1 of

the PCSR), though this is not required.

3. The Intel XScale

®

processor writes 90H to the

“PCI Express Next Item Pointer

Register - PCIE_NXTP” on page 341

. This links the PCI Express Capabilities List

Item to the VPD Capabilities List Item.

4. The Intel XScale

®

processor clears bit 17 of the ATUIMR to enable the ATUs VPD

interrupt status bit.

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