Intel CONTROLLERS 413808 - Manual (Page 42)

Intel
®
413808 and 413812—Introduction
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
42 Order Number: 317805-001US
1.4 About the Intel
®
413808 and 413812 I/O Controllers in
TPER Mode
The 4138xx is a single-function PCI devices that integrates two Intel XScale
®
processors with intelligent peripherals including a PCI bus application bridge and eight
Serial-Attached SCSI (SAS) Engines. The SAS Engines on the 4138xx also support
direct-attached Serial ATA (SATA) targets. The 4138xx also supports two internal
busses: north internal bus and south internal bus. With the two internal busses,
transactions can take place simultaneously on each bus. The north internal bus
generates large burst transactions are located on the south internal bus, thus allowing
the two Intel XScale
®
processors exclusive access to the north internal bus.
The 4138xx consolidates, into a single system:
• Two Intel XScale
®
processors
• Eight Serial-Attached SCSI Links - also capable of supporting direct-attached SATA
targets
• PCI - Local Memory Bus Address Translation Unit - PCI function 0
• Messaging Unit
• Inter-Processor Communication
• Inter-Processor Messaging Unit
• Third Party Messaging Interface (TPMI)
• Peripheral Bus Interface Unit (PBI)
• Integrated SRAM Memory Controller
• Performance Monitor ( PMON )
• Two Programmable Timers per Intel XScale
®
processor
• Watchdog Timer per Intel XScale
®
processor
• Three I
2
C Bus Interface Units
• Two Serial Port Units
• Sixteen General Purpose Input Output (GPIO) ports
• Two SGPIO busses
• Internal North Bus-South Bus Bridge
It is an integrated processor that addresses the needs of intelligent I/O Storage
applications and helps reduce intelligent I/O system costs.
Both the address and data busses on the 4138xx south internal bus are byte-wise
parity protected.