5 non-register-based interfaces, 1 events input port, 2 output signals – Intel CONTROLLERS 413808 User Manual

Page 743

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Intel

®

413808 and 413812 I/O Controllers in TPER Mode

October 2007

Developer’s Manual

Order Number: 317805-001US

743

PMON Unit—Intel

®

413808 and 413812

16.5

Non-Register-Based Interfaces

This section describes the interfaces to the

PMON

unit that are not part of the register

scheme already documented.

16.5.1

Events Input Port

Signals representing internal events are sent to the event preconditioning block where

they are conditioned when required. The most common preconditioning is likely to be

clock synchronization. No programmable Boolean operations can be performed on

these events, but appropriate Boolean operations can be performed by the hardware.
Duration type events continually assert their signal high ('1'). The event

pre-conditioning block 'ANDs' the duration type signal with a clock to produce the

correct count.
Any events from different frequency domains must be preconditioned to assure count

accuracy measured. For these clock domain crossing signals, 95% accuracy is sufficient

over a 1 us or larger sampling window. It would be very difficult to assure accuracy of

very small windows (< 1 us) without requiring a great amount of hardware to verify.

16.5.2

Output Signals

There are three potential sources of internal indicators from each counter. Each source

can independently generate an indication. These are:

• a programmable threshold condition was true,

• a command was triggered to begin

• a counter overflow or underflow occurred.

Each of these conditions always sets a corresponding status bit. Indicator enable bits

control which of these indicator sources drive the top level indicator. The indicators are

OR'd together as shown in

Figure 118, “Indicator Tree” on page 744

. These internal

signals are further controlled to generate either an Interrupt or an Indicator Output.

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