Intel CONTROLLERS 413808 - Manual (Page 562)

Intel
®
413808 and 413812—Peripheral Bus Interface Unit
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
562 Order Number: 317805-001US
9.3.9 Processor Frequency Register - PFR
This register indicates the clock frequencies of the Intel XScale
®
processor and the
internal buses of the 4138xx. For products with two enabled Intel XScale
®
processors,
the cores run at the same clock frequency.
Table 372. Processor Frequency Register - PFR
Bit Default Description
31:21 xH Reserved. Values read are undefined.
20:19 Dependent on the
Product Type.
XSI Bus Frequency Status. Note that the internal bus frequency is set at manufacturing time and is
product dependent, which means that not all the frequencies as listed below are supported.
Bits Ratio
00
2
2:1 - Indicates that the Internal bus is running at the Core Frequency divided by 2.
01
2
3:1 - Indicates that the Internal bus is running at the Core Frequency divided by 3.
10
2
4:1 - Indicates that the Internal bus is running at the Core Frequency divided by 4.
11
2
Reserved
18:16 Dependent on the
Product Type.
Intel XScale ® processor Frequency Status. Note that the Intel XScale ® processor frequency is set at
manufacturing time and is product dependent, which means that not all the frequencies as listed
below are supported.
Bits Core Frequency
000
2
600 MHz
001
2
667 MHz
010
2
800 MHz
011
2
933 MHz
100
2
1000 MHz
101
2
1200 MHz
110
2
Reserved
111
2
Reserved
15:00 xH Reserved. Values read are undefined.
PCI
IOP
Attributes
Attributes
28 24 20 16 12 8 4 0 31
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
ro
na
ro
na
ro
na
ro
na
ro
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Intel XScale ® processor Local Bus Address offset
+2180H