Intel CONTROLLERS 413808 - Manual (Page 471)

Intel ® 413808 and 413812 I/O Controllers in TPER Mode
October 2007 Developer’s Manual
Order Number: 317805-001US 471
SGPIO Unit—Intel
®
413808 and 413812
Example 5. Both SGPIO Units are used in SGPIO mode with SGPIO Unit 0 supporting
Drives[0,1,3,4,5,6] and SGPIO Unit 1 supporting Drives[2,7]
In this example, both SGPIO units are used and they are set up in SGPIO mode by
setting bit[0] in Table 321, “SGPIO Interface Control Register x - SGICRx” on page 475 .
SGPIO unit 0 supports six drives. The drive shift order for SGPIO unit 0 is programmed
as follows: Drive 6 (first drive to be shifted), Drive 4, Drive 3, Drive 5, Drive 0, Drive 1,
Drive 2, and Drive 7 (last drive to be shifted). Note that the last two drives (2 and 7)
are not used for SGPIO unit 0, but are simply programmed in that order in Table 324,
“SGPIO Start Drive Upper Register x — SGSDURx” on page 480 . Table 316 shows the
outputs[7:0] of the multiplexer block for SGPIO unit 0.
SGPIO unit 1 supports two drives. The drive order for SGPIO unit 1 is programmed as
follows: Drive 7 (first drive to be shifted), Drive 2, Drive 0, Drive 1, Drive 3, Drive 4,
Drive 5, Drive 6 (last drive to be shifted). Note that the last six drives (0, 1, 3, 4, 5,
and 6) are not used for SGPIO unit 1, but are simply programmed in that order in
Table 324, “SGPIO Start Drive Upper Register x — SGSDURx” on page 480 . Table 317
shows the outputs[7:0] of the multiplexer block for SGPIO unit 1.
Table 316. SGPIO Unit 0 Multiplexer Block Outputs for Example 2
Multiplexe
r Block
Output
Output 7 Output 6 Output 5 Output 4 Output 3 Output 2 Output 1 Output 0
Drive to
Shift
Register
a
a. The grayed cells imply that these outputs are not valid for this example, but are programmed in that manner
and yield the outputs shown.
Drive 7 Drive 2 Drive 1 Drive 0 Drive 5 Drive 3 Drive 4 Drive 6
Drive to
Direct LED
Signals
a,b
b. This entire row is shown simply to demonstrate how the drives’ order would be mapped if the SGPIO Unit 0
were used in Direct LED mode.
N/A c
c. The cells labeled “N/A” are not valid outputs for Direct LED Mode. For example, they are not connected.
N/A N/A N/A Drive 5 Drive 3 Drive 4 Drive 6
Table 317. SGPIO Unit 1 Multiplexer Block Outputs for Example 2
Multiplexer
Block
Output
Output 7 Output 6 Output 5 Output 4 Output 3 Output 2 Output 1 Output 0
Drive to
Shift
Register
a
a. The grayed cells imply that these outputs are not valid for this example, but are programmed in that manner
and yield the outputs shown.
Drive 6 Drive 5 Drive 4 Drive 3 Drive 1 Drive 0 Drive 2 Drive 7
Drive to
Direct LED
Signals
a,b
b. This entire row is shown simply to demonstrate how the drives’ order would be mapped if the SGPIO Unit 0
were used in Direct LED mode.
N/A c
c. The cells labeled “N/A” are not valid outputs for Direct LED Mode. For example, they are not connected.
N/A N/A N/A Drive 1 Drive 0 Drive 2 Drive 7