Intel CONTROLLERS 413808 - Manual (Page 26)

Intel
®
413808 and 413812—Contents
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
26 Order Number: 317805-001US
109 PCI Interface Error Control and Status Register - PIECSR.............................................220
110 PCI Interface Error Address Register - PCIEAR............................................................221
111 PCI Interface Error Upper Address Register - PCIEUAR.................................................222
112 PCI Interface Error Context Address Register - PCIECAR ..............................................223
113 Internal Arbiter Control Register - IACR.....................................................................224
114 Multi-Transaction Timer - MTT..................................................................................225
115 PCIX RCOMP Control Register - PRCR ........................................................................226
116 PCIX Pad ODT Drive Strength Manual Override Values Registers - PPODSMOVR ..............227
117 PCIX PAD DRIVE STRENGTH Manual Override Values Register (3.3V/1.5V Switch
Supply Voltage) — PPDSMOVR3.3_1.5 ......................................................................228
118 PCIX PAD DRIVE STRENGTH Manual Override Values Register
(3.3 V Dedicated Supply Voltage) — PPDSMOVR3.3 ....................................................229
119 Supported Address Spaces and Transaction Types ......................................................235
120 ATU Command Support...........................................................................................236
121 Inbound Vendor_Defined Message Type 0 Response....................................................243
122 Outbound Address Translation Control.......................................................................245
123 Internal Bus-to-PCI Command Translation for Memory Windows ...................................246
124 Internal Bus-to-PCI Command Translation for I/O Window ...........................................246
125 Supported Message Types .......................................................................................258
126 Inbound Queues.....................................................................................................261
127 PCI to Internal Bus Command Translation for All Inbound Transactions..........................262
128 Outbound Queues...................................................................................................263
129 ATU Inbound Data Flow Ordering Rules .....................................................................264
130 ATU Outbound Data Flow Ordering Rules ...................................................................265
131 Inbound Transaction Ordering Summary....................................................................267
132 Outbound Transaction Ordering Summary..................................................................267
133 Parity Generation ...................................................................................................268
134 Advisory Error Cases...............................................................................................271
135 PCI Express Error Summary.....................................................................................276
137 Internal Bus Error Summary ....................................................................................278
136 Root Complex Error Summary..................................................................................278
138 PCI Express Interface Control Parameters Usage ........................................................285
139 PCI Express Interface Status Reporting Usage ...........................................................287
140 ATU Internal Bus Memory Mapped Register Range Offsets............................................293
141 ATU PCI Configuration Register Space .......................................................................294
142 ATU Vendor ID Register - ATUVID.............................................................................297
143 ATU Device ID Register - ATUDID.............................................................................297
144 ATU Command Register - ATUCMD...........................................................................298
145 ATU Status Register - ATUSR ...................................................................................299
146 ATU Revision ID Register - ATURID...........................................................................300
147 ATU Class Code Register - ATUCCR ...........................................................................300
148 ATU Cacheline Size Register - ATUCLSR.....................................................................301
149 ATU Latency Timer Register - ATULT .........................................................................301
150 ATU Header Type Register - ATUHTR.........................................................................302
151 ATU BIST Register - ATUBISTR.................................................................................303
152 Inbound ATU Base Address Register 0 - IABAR0 .........................................................304
153 Inbound ATU Upper Base Address Register 0 - IAUBAR0 ..............................................305
154 Memory Block Size Read Response ...........................................................................306
155 ATU Base Registers and Associated Limit Registers .....................................................307
156 Inbound ATU Base Address Register 1 - IABAR1 .........................................................308
157 Inbound ATU Upper Base Address Register 1 - IAUBAR1 ..............................................309
158 Inbound ATU Base Address Register 2 - IABAR2 .........................................................310
159 Inbound ATU Upper Base Address Register 2 - IAUBAR2 ..............................................311
160 ATU Subsystem Vendor ID Register - ASVIR...............................................................312
161 ATU Subsystem ID Register - ASIR ...........................................................................312