Intel CONTROLLERS 413808 - Manual (Page 589)

Intel ® 413808 and 413812 I/O Controllers in TPER Mode
October 2007 Developer’s Manual
Order Number: 317805-001US 589
Interrupt Controller Unit—Intel
®
413808 and 413812
10.7.7 Interrupt Pending Register 2 — INTPND2
The Interrupt Pending register 0 is a 32-bit Coprocessor 6 control register that can be
used to verify pending interrupts. Software can use this registers to poll interrupts as
this register is located before the INTCTL2 mask Register.
Table 389. Interrupt Pending Register 2 — INTPND2
Bit Default Description
31 0
2
SRAM Memory Controller Unit Error Interrupt Pending.
30 0
2
South Internal Bus Bridge Error Interrupt Pending.
29 0
2
Reserved.
28 0
2
Reserved.
27 0
2
Reserved.
26 0
2
Reserved.
25 0
2
Reserved.
24 0
2
Reserved.
23 0
2
Reserved.
22 0
2
Reserved.
21 0
2
Reserved.
20 0
2
Reserved.
19 0
2
Reserved.
18 0
2
Reserved.
17 0
2
Reserved.
16 0
2
Reserved.
15 0
2
Reserved.
14 0
2
Reserved.
13 0
2
SRAM DMA Error Interrupt Pending.
12 0
2
SRAM DMA Normal Interrupt Pending.
11 0
2
Reserved.
10 0
2
Reserved.
09 0
2
Reserved.
08 0
2
Reserved.
07 0
2
Reserved.
06 0
2
Reserved.
05 0
2
Reserved.
04 0
2
Reserved.
03 0
2
Reserved.
02 0
2
Reserved.
01 0
2
Reserved.
00 0
2
Reserved.
Memory
Coprocessor
Attributes
Attributes
28 24 20 16 12 8 4 0 31
ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro
na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Intel XScale ® processor Coprocessor address
CP6, Page 3, Register 2