Intel CONTROLLERS 413808 - Manual (Page 724)

Intel ® 413808 and 413812—General Purpose I/O Unit
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
724 Order Number: 317805-001US
15.2 Register Definitions
All GPIO are visible as 4138xx memory mapped registers and can be accessed through
the internal memory bus. Each is a 32-bit register and is memory-mapped in the Intel
XScale
®
processor memory space.
The programmer interface to the General Purpose I/O is through memory-mapped
control registers. Table 477 describes these registers.
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Table 477. General Purpose I/O Registers Addresses
Register Name Description MMR Address Offset
GPOE GPIO Output Enable Register 2480H
GPID GPIO Input Data Register 2484H
GPOD GPIO Output Data Register 2488H