Intel CONTROLLERS 413808 - Manual (Page 260)

Intel
®
413808 and 413812—Address Translation Unit (PCI Express)
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
260 Order Number: 317805-001US
3.7 Expansion ROM Translation Unit
The inbound ATU supports one address range (defined by a base/limit register pair)
used for the Expansion ROM. Refer to the PCI Local Bus Specification, Revision 2.3 for
details on Expansion ROM format and usage.
During a powerup sequence, initialization code from Expansion ROM is executed once
by the host processor to initialize the associated device. The code can be discarded
once executed. Expansion ROM registers are described in Section 3.17.22 .
The inbound ATU supports an inbound Expansion ROM window which works like the
inbound translation window. A read from the expansion ROM windows is forwarded to
the internal bus. The address translation algorithm is the same as the inbound
translation; see Section 3.3.1.1, “Inbound Address Translation” on page 237 .
The Expansion ROM unit uses the ATU inbound transaction queue and the inbound read
data queue.
Expansion ROM writes are not supported and result in a Completer Abort.
Note: Both the Memory Space enable and Expansion ROM Base Address Enable bits must be
set to 1 before the ATU accepts accesses to its Expansion ROM.