9 uart x scratchpad register, Table 458. uart x scratchpad register - (uxscr), 458 uart x scratchpad register - (uxscr) – Intel CONTROLLERS 413808 User Manual
Page 684
Intel
®
413808 and 413812—UARTs
Intel
®
413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual
October 2007
684
Order Number: 317805-001US
13.4.9
UART x Scratchpad Register
This read/write register has no effect on the UART. It is intended as a scratchpad
register for use by programmers.
Table 458. UART x Scratchpad Register - (UxSCR)
Bit
Default
Description
31:8
00 0000h
Reserved
7:0
00h
No effect on UART functionality
PC
I
IO
P
A
tt
ri
bu
te
s
A
tt
ri
bu
te
s
28
24
20
16
12
8
4
0
31
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rw
na
rw
na
rw
na
rw
na
rw
na
rw
na
rw
na
rw
na
Unit #
01
Intel XScale
®
Core internal bus address
+231CH (DLAB=x)
+235CH (DLAB=x)
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible