7 atu revision id register - aturid, Table 146. atu revision id register - aturid, 8 atu class code register - atuccr – Intel CONTROLLERS 413808 User Manual
Page 300: Table 147. atu class code register - atuccr, 146 atu revision id register - aturid, 147 atu class code register - atuccr, Intel, Bit default description, 00 xxh, A. see intel
Intel
®
413808 and 413812—Address Translation Unit (PCI Express)
Intel
®
413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual
October 2007
300
Order Number: 317805-001US
3.17.7
ATU Revision ID Register - ATURID
Revision ID Register bit definitions adhere to PCI Local Bus Specification, Revision 2.3.
3.17.8
ATU Class Code Register - ATUCCR
Class Code Register bit definitions adhere to PCI Local Bus Specification, Revision 2.3.
Auto configuration software reads this register to determine the PCI device function.
Table 146. ATU Revision ID Register - ATURID
Bit
Default
Description
07:00
xxH
a
a. See Intel
®
81348 I/O Processor Specification Update.
ATU Revision - identifies the 4138xx revision number.
PCI
IOP
Attributes
Attributes
7
4
0
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Internal Bus Address Offset
+008H
Table 147. ATU Class Code Register - ATUCCR
Bit
Default
Description
23:16
05H
Base Class - Memory Controller
15:08
80H
Sub Class - Other Memory Controller
07:00
00H
Programming Interface - None defined
PCI
IOP
Attributes
Attributes
23
20
16
12
8
4
0
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
rw
ro
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Internal Bus Address Offset
+009H