Intel CONTROLLERS 413808 - Manual (Page 351)

Intel ® 413808 and 413812 I/O Controllers in TPER Mode
October 2007 Developer’s Manual
Order Number: 317805-001US 351
Address Translation Unit (PCI Express)—Intel
®
413808 and 413812
3.17.65 PCI Express Slot Control Register - PE_SCR
This register controls PCI Express Slot specific parameters.
4138xx does not implement Hot-Plug support for its downstream ports when operating
as a root complex. This is left as R/W for the IOP in case a software solution can be
implemented using the GPIO pins.
Table 205. PCI Express Slot Control Register PE_SCR
Bit Default Description
15:11 0H Reserved
10 0 Power Controller Control
9:8 00 Power Indicator Control
7:6 00 Attention Indicator Control
5 0 Hot-Plug Interrupt Enable
4 0 Command Completed Interrupt Enable
3 0 Presence Detect Changed Enable
2 0 MRL Sensor Changed Enable
1 0 Power Fault Detected Enable
0 0 Attention Button Power Enable
PCI
IOP
Attributes
Attributes
15 12 8 4 0
pr
pr
pr
pr
pr
pr
pr
pr
pr
pr
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Internal Bus Address Offset
+0E8H