Intel CONTROLLERS 413808 - Manual (Page 9)

Intel ® 413808 and 413812 I/O Controllers in TPER Mode
October 2007 Developer’s Manual
Order Number: 317805-001US 9
Contents—Intel
®
413808 and 413812
3.17.5 ATU Command Register - ATUCMD ......................................................... 298
3.17.6 ATU Status Register - ATUSR................................................................. 299
3.17.7 ATU Revision ID Register - ATURID......................................................... 300
3.17.8 ATU Class Code Register - ATUCCR......................................................... 300
3.17.9 ATU Cacheline Size Register - ATUCLSR................................................... 301
3.17.10ATU Latency Timer Register - ATULT....................................................... 301
3.17.11ATU Header Type Register - ATUHTR....................................................... 302
3.17.12ATU BIST Register - ATUBISTR............................................................... 303
3.17.13Inbound ATU Base Address Register 0 - IABAR0 ....................................... 304
3.17.14Inbound ATU Upper Base Address Register 0 - IAUBAR0............................ 305
3.17.15Determining Block Sizes for Base Address Registers.................................. 306
3.17.16Inbound ATU Base Address Register 1 - IABAR1 ....................................... 308
3.17.17Inbound ATU Upper Base Address Register 1 - IAUBAR1............................ 309
3.17.18Inbound ATU Base Address Register 2 - IABAR2 ....................................... 310
3.17.19Inbound ATU Upper Base Address Register 2 - IAUBAR2............................ 311
3.17.20ATU Subsystem Vendor ID Register - ASVIR ............................................ 312
3.17.21ATU Subsystem ID Register - ASIR......................................................... 312
3.17.22Expansion ROM Base Address Register - ERBAR........................................ 313
3.17.23ATU Capabilities Pointer Register - ATU_Cap_Ptr....................................... 314
3.17.24ATU Interrupt Line Register - ATUILR...................................................... 315
3.17.25ATU Interrupt Pin Register - ATUIPR ....................................................... 316
3.17.26ATU Minimum Grant Register - ATUMGNT ................................................ 316
3.17.27ATU Maximum Latency Register - ATUMLAT ............................................. 317
3.17.28Inbound ATU Limit Register 0 - IALR0 ..................................................... 318
3.17.29Inbound ATU Translate Value Register 0 - IATVR0 .................................... 319
3.17.30Inbound ATU Upper Translate Value Register 0 - IAUTVR0 ......................... 319
3.17.31Inbound ATU Limit Register 1 - IALR1 ..................................................... 320
3.17.32Inbound ATU Translate Value Register 1 - IATVR1 .................................... 321
3.17.33Inbound ATU Upper Translate Value Register 1 - IAUTVR1 ......................... 321
3.17.34Inbound ATU Limit Register 2 - IALR2 ..................................................... 322
3.17.35Inbound ATU Translate Value Register 2 - IATVR2 .................................... 323
3.17.36Inbound ATU Upper Translate Value Register 2 - IAUTVR2 ......................... 324
3.17.37Expansion ROM Limit Register - ERLR...................................................... 324
3.17.38Expansion ROM Translate Value Register - ERTVR..................................... 325
3.17.39Expansion ROM Upper Translate Value Register - ERUTVR.......................... 325
3.17.40ATU Configuration Register - ATUCR ....................................................... 326
3.17.41PCI Configuration and Status Register - PCSR .......................................... 327
3.17.42ATU Interrupt Status Register - ATUISR .................................................. 329
3.17.43ATU Interrupt Mask Register - ATUIMR.................................................... 332
3.17.44PCI Express Message Control/Status Register - PEMCSR ............................ 333
3.17.45PCI Express Link Control/Status Register - PELCSR ................................... 334
3.17.46VPD Capability Identifier Register - VPD_Cap_ID ...................................... 335
3.17.47VPD Next Item Pointer Register - VPD_Next_Item_Ptr............................... 335
3.17.48VPD Address Register - VPDAR............................................................... 336
3.17.49VPD Data Register - VPDDR................................................................... 336
3.17.50PM Capability Identifier Register - PM_Cap_ID.......................................... 337
3.17.51PM Next Item Pointer Register - PM_Next_Item_Ptr .................................. 337
3.17.52ATU Power Management Capabilities Register - APMCR.............................. 338
3.17.53ATU Power Management Control/Status Register - APMCSR ....................... 339
3.17.54ATU Scratch Pad Register - ATUSPR........................................................ 340
3.17.55PCI Express Capability List Register - PCIE_CAPID .................................... 340
3.17.56PCI Express Next Item Pointer Register - PCIE_NXTP ................................ 341
3.17.57PCI Express Capabilities Register - PCIE_CAP........................................... 342
3.17.58PCI Express Device Capabilities Register - PCIE_DCAP............................... 343
3.17.59PCI Express Device Control Register - PE_DCTL........................................ 344