Intel CONTROLLERS 413808 - Manual (Page 603)

Intel ® 413808 and 413812 I/O Controllers in TPER Mode
October 2007 Developer’s Manual
Order Number: 317805-001US 603
Interrupt Controller Unit—Intel
®
413808 and 413812
10.7.16 Interrupt Steering Register 3 — INTSTR3
The Interrupt Steering Register 3 allows system designers to direct any of 32 internal
or external interrupt sources to either one of the two internal interrupt exceptions, FIQ
and IRQ.
When an interrupt is enabled with the INTCTL3 register, this register steers the
interrupt to an internal interrupt exception.
Table 398. Interrupt Steering Register 3 — INTSTR3 (Sheet 1 of 2)
Bit Default Description
31 0
2
HPI Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
30:18 0
2
Reserved.
17 0
2
Inbound MSI Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
16 0
2
Reserved.
15 0
2
MU MSI-X Table Write Interrupt Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
14 0
2
ATUE Interrupt Message D Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
13 0
2
ATUE Interrupt Message C Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
12 0
2
ATUE Interrupt Message B Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
11 0
2
ATUE Interrupt Message A Steering
0 = Interrupt Directed to Internal IRQ
1 = Interrupt Directed to Internal FIQ
10:08 0
2
Reserved.
07 0
2
TPMI 0 Outbound Interrupt Steering.
0 = 0 = Interrupt Directed to Internal IRQ
1 = 1 = Interrupt Directed to Internal FIQ
06:05 0
2
Reserved.
Memory
Coprocessor
Attributes
Attributes
28 24 20 16 12 8 4 0 31
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Intel XScale ® processor Coprocessor
address
CP6, Page 5, Register 3