Intel, Bit default description, Parity n – Intel CONTROLLERS 413808 User Manual

Page 544: Parity error, Ecc error n, Ecc error 0

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Intel

®

413808 and 413812—SRAM Memory Controller

Intel

®

413808 and 413812 I/O Controllers in TPER Mode

Developer’s Manual

October 2007

544

Order Number: 317805-001US

8.6.11

SRAM Memory Controller Interrupt Status Register — SMCISR

Setting the SMCISR asserts an interrupt to the core. Upon an interrupt, the Intel

XScale

®

processor polls the interrupt status register for each unit. The interrupt status

register tells the core the reason for the interrupt. The SMCU has five interrupt

conditions: first ECC error (SMCISR[0]), more than one ECC error (SMCISR[1]), first

parity error (SMCISR[8]), and more than one parity error (SMCISR[9]).
If the SMCU detects an ECC error and SMCISR[0] is cleared, the error is logged in

SELOG and SMCISR[0] is set to 1. If SMCISR[0] is not cleared, any additional ECC

errors are not logged and SMCISR[1] is set.
Similarly, if the SMCU detects a parity error and SMCISR[8] is cleared, the parity error

is logged in SPCSR and SMCISR[8] is set to 1. If SMCISR[8] is not cleared, any

additional parity errors are not logged and SMCISR[9] is set.

Table 360. SRAM Memory Controller Interrupt Status Register — SMCISR

Bit

Default

Description

31:05

0000 000H

Reserved

09

0

2

Parity N:

Indicates that the SMCU detected a Parity error while SMCISR[8] was set.

0 = No error detected

1 = Error detected

08

0

2

Parity Error:

Indicates that the SMCU detected a Parity error and recorded the error in SPCSR.

0 = No error detected

1 = Error detected and recorded in SPLOG

07:04

0H

Reserved

03

0

2

Address Range Error: Indicates that a transaction to an invalid address range. For example, an

address that is outside the 1.0 MBytes SRAM space.

0 = No error detected

1 = Error detected

02

0

2

Reserved

01

0

2

ECC Error N:

Indicates that the SMCU detected an ECC error while MCISR[0] was set.

0 = No error detected

1 = Error detected

00

0

2

ECC Error 0:

Indicates that the SMCU detected an ECC error and recorded the error in SELOG.

0 = No error detected

1 = Error detected and recorded in SELOG

PCI

IOP

Attributes

Attributes

28

24

20

16

12

8

4

0

31

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rv

na

rc

na

rc

na

rv

na

rv

na

rv

na

rv

na

rc

na

rv

na

rc

na

rc

na

Attribute Legend:

RV = Reserved

PR = Preserved

RS = Read/Set

RW = Read/Write

RC = Read Clear

RO = Read Only

NA = Not Accessible

Intel XScale

®

processor Local Bus Address

Offset

+152CH

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