Intel CONTROLLERS 413808 - Manual (Page 581)

Intel ® 413808 and 413812 I/O Controllers in TPER Mode
October 2007 Developer’s Manual
Order Number: 317805-001US 581
Interrupt Controller Unit—Intel
®
413808 and 413812
10.7 Interrupt Control Unit Registers
All Interrupt Controller registers are visible as 4138xx memory mapped registers and
can be accessed through the internal memory bus. Each is a 32-bit register and is
memory-mapped in the Intel XScale
®
processor memory space. The programmer
interface to the interrupt controller is through the coprocessor registers. Table 382
describes these registers.
The coprocessor registers may be accessed/manipulated with the MCR, MRC, STC, and
LDC instructions. The CRn field of the instruction denotes the register number to be
accessed. The opcode_1, opcode_2, and CRm fields of the instruction should be zero.
Most systems restrict access to CP6 to privileged processes. To control access to CP6,
use the Coprocessor Access Register.
Table 382. Interrupt Controller Co-Processor Register Addresses (Sheet 1 of 2)
Register Name Description
Coprocessor CP6
(CR
m
Field)
Register (CR
n
Field) or MMR
Address
INTBASE Interrupt Base Register
2
Register 0
Reserved Reserved Register 1
INTSIZE Interrupt Size Register Register 2
IINTVEC IRQ Interrupt Vector Register Register 3
FINTVEC FIQ Interrupt Vector Register Register 4
IPIPNDR Reserved Register 8
Reserved Reserved Register 9
INTPND0 Interrupt Pending Register 0
3
Register 0
INTPND1 Interrupt Pending Register 1 Register 1
INTPND2 Interrupt Pending Register 2 Register 2
INTPND3 Interrupt Pending Register 3 Register 3
INTCTL0 Interrupt Control Register 0
4
Register 0
INTCTL1 Interrupt Control Register 1 Register 1
INTCTL2 Interrupt Control Register 2 Register 2
INTCTL3 Interrupt Control Register 3 Register 3
INTSTR0 Interrupt Steering Register 0
5
Register 0
INTSTR1 Interrupt Steering Register 1 Register 1
INTSTR2 Interrupt Steering Register 2 Register 2
INTSTR3 Interrupt Steering Register 3 Register 3
IINTSRC0 IRQ Interrupt Source Register 0
6
Register 0
IINTSRC1 IRQ Interrupt Source Register 1 Register 1
IINTSRC2 IRQ Interrupt Source Register 2 Register 2
IINTSRC3 IRQ Interrupt Source Register 3 Register 3
FINTSRC0 FIQ Interrupt Source Register 0
7
Register 0
FINTSRC1 FIQ Interrupt Source Register 1 Register 1
FINTSRC2 FIQ Interrupt Source Register 2 Register 2
FINTSRC3 FIQ Interrupt Source Register 3 Register 3