Intel CONTROLLERS 413808 - Manual (Page 306)

Intel
®
413808 and 413812—Address Translation Unit (PCI Express)
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
306 Order Number: 317805-001US
3.17.15 Determining Block Sizes for Base Address Registers
The required address size and type can be determined by writing ones to a base
address register and reading from the registers. By scanning the returned value from
the least-significant bit of the base address registers upwards, the programmer can
determine the required address space size. The binary-weighted value of the first
non-zero bit found indicates the required amount of space. Table 154 describes the
relationship between the values read back and the byte sizes the base address register
requires.
As an example, assume that FFFF.FFFFH is written to the Inbound ATU Base Address
Register 0 - IABAR0 and the value read back is FFF0.0008H. Bit zero is a zero, so the
device requires memory address space. Bit three is one, so the memory does supports
prefetching. Scanning upwards starting at bit four, bit twenty is the first one bit found.
The binary-weighted value of this bit is 1,048,576, indicated that the device requires 1
Mbyte of memory space.
The ATU Base Address Registers and the Expansion ROM Base Address Register use
their associated limit registers to enable which bits within the base address register are
read/write and which bits are read only (0). This allows the programming of these
registers in a manner similar to other PCI devices even though the limit is variable.
Table 154. Memory Block Size Read Response
Response After Writing all 1s
to the Base Address Register
Size
(in Bytes)
Response After Writing all 1s
to the Base Address Register
Size
(in Bytes)
FFFFFFF0H 16 FFF00000H 1 M
FFFFFFE0H 32 FFE00000H 2 M
FFFFFFC0H 64 FFC00000H 4 M
FFFFFF80H 128 FF800000H 8 M
FFFFFF00H 256 FF000000H 16 M
FFFFFE00H 512 FE000000H 32 M
FFFFFC00H 1K FC000000H 64 M
FFFFF800H 2K F8000000H 128 M
FFFFF000H 4K F0000000H 256 M
FFFFE000H 8K E0000000H 512 M
FFFFC000H 16K C0000000H 1 G
FFFF8000H 32K 80000000H 2 G
FFFF0000H 64K
00000000H
Register not
implemented
, no address
space
required.
FFFE0000H 128K
FFFC0000H 256K
FFF80000H 512K