37 expansion rom limit register - erlr, Table 177. expansion rom limit register - erlr, 37expansion rom limit register - erlr – Intel CONTROLLERS 413808 User Manual

Page 324: 177 expansion rom limit register - erlr, Inbound, Intel, Bit default description

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413808 and 413812—Address Translation Unit (PCI Express)

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413808 and 413812 I/O Controllers in TPER Mode

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3.17.36 Inbound ATU Upper Translate Value Register 2 - IAUTVR2

The Inbound ATU Upper Translate Value Register 2 (IAUTVR2) in conjunction with the

“Inbound ATU Translate Value Register 2 - IATVR2” on page 323

contain bits 35 to 8 of

the internal bus address used to convert PCI Express Link addresses. The converted

address is driven on the internal bus as a result of the inbound ATU address translation.

3.17.37 Expansion ROM Limit Register - ERLR

The Expansion ROM Limit Register (ERLR) defines the block size of addresses the ATU

defines as Expansion ROM address space. Block size is programmed by writing a value

into the ERLR.
Bits 31 to 12 within the ERLR have a direct effect on the ERBAR register, bits 31 to 12,

with a one to one correspondence. A value of 0 in a bit within the ERLR makes the

corresponding bit within the ERBAR a read only bit which always returns 0. A value of 1

in a bit within the ERLR makes the corresponding bit within the ERBAR read/write from

PCI.

Table 176. Inbound ATU Upper Translate Value Register 2 - IAUTVR2

Bit

Default

Description

31:04

000 0000H Reserved

3:0

Inbound Upper ATU Translation Value 2 - This value represents bits 35 to 32 of the internal bus address

used to convert the PCI address to internal bus addresses.

PCI

IOP

Attributes

Attribute Legend:

RV = Reserved

PR = Preserved

RS = Read/Set

RW = Read/Write

RC = Read Clear

RO = Read Only

NA = Not Accessible

Internal Bus Address Offset

+060H

Table 177. Expansion ROM Limit Register - ERLR

Bit

Default

Description

31:12

000000H

Expansion ROM Limit - Block size of memory required for Expansion ROM translation unit. Default value

is 0, which indicates no Expansion ROM address space and all bits within the ERBAR are read only with a

value of 0.

11:00

000H

Reserved

PCI

IOP