24 fiq interrupt source register 3 - fintsrc3, 24fiq interrupt source register 3 — fintsrc3, 406 fiq interrupt source register 3 — fintsrc3 – Intel CONTROLLERS 413808 User Manual

Page 617: 24 fiq interrupt source register 3 — fintsrc3

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Intel

®

413808 and 413812 I/O Controllers in TPER Mode

October 2007

Developer’s Manual

Order Number: 317805-001US

617

Interrupt Controller Unit—Intel

®

413808 and 413812

10.7.24 FIQ Interrupt Source Register 3 — FINTSRC3

The FIQ Interrupt Source register 3 is a 32-bit Coprocessor 6 control register used to

specify which interrupts that are steered to the internal FIQ exception are unmasked by

the INTCTL3 register and active. The INTSTR3 control register is used to steer

individual interrupts to the FIQ exception.
The FINTSRC3 register may be used by an Interrupt Service Routine (ISR) to

determine quickly the source of an FIQ interrupt.

Table 406. FIQ Interrupt Source Register 3 — FINTSRC3 (Sheet 1 of 2)

Bit

Default

Description

31

0

2

HPI Interrupt

0 = Not Interrupting or Not steered to internal FIQ exception or masked by INTCTL3

1 = Interrupting and steered to internal FIQ exception and unmasked by INTCTL3

30:18

0

2

Reserved.

17

0

2

Inbound MSI Interrupt

0 = Not Interrupting or Not steered to internal FIQ exception or masked by INTCTL3

1 = Interrupting and steered to internal FIQ exception and unmasked by INTCTL3

16

0

2

Reserved.

15

0

2

MU MSI-X Table Write Interrupt

0 = Not Interrupting or Not steered to internal FIQ exception or masked by INTCTL3

1 = Interrupting and steered to internal FIQ exception and unmasked by INTCTL3

14

0

2

ATUE Interrupt Message D

0 = Not Interrupting or Not steered to internal FIQ exception or masked by INTCTL3

1 = Interrupting and steered to internal FIQ exception and unmasked by INTCTL3

13

0

2

ATUE Interrupt Message C

0 = Not Interrupting or Not steered to internal FIQ exception or masked by INTCTL3

1 = Interrupting and steered to internal FIQ exception and unmasked by INTCTL3

12

0

2

ATUE Interrupt Message B

0 = Not Interrupting or Not steered to internal FIQ exception or masked by INTCTL3

1 = Interrupting and steered to internal FIQ exception and unmasked by INTCTL3

11

0

2

ATUE Interrupt Message A

0 = Not Interrupting or Not steered to internal FIQ exception or masked by INTCTL3

1 = Interrupting and steered to internal FIQ exception and unmasked by INTCTL3

10:08

0

2

Reserved.

07

0

2

TPMI 0 Outbound Interrupt.

0 = 0 = Not Interrupting or Not steered to internal FIQ exception or masked by INTCTL3

1 = 1 = Interrupting and steered to internal FIQ exception and unmasked by INTCTL3

06:05

0

2

Reserved.

Memory

Coprocessor

Attributes

Attributes

28

24

20

16

12

8

4

0

31

ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro ro

na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na na

Attribute Legend:

RV = Reserved

PR = Preserved

RS = Read/Set

RW = Read/Write

RC = Read Clear

RO = Read Only

NA = Not Accessible

Intel XScale

®

processor Coprocessor

address

CP6, Page 7, Register 3

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