Intel CONTROLLERS 413808 - Manual (Page 314)

Intel
®
413808 and 413812—Address Translation Unit (PCI Express)
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
314 Order Number: 317805-001US
3.17.23 ATU Capabilities Pointer Register - ATU_Cap_Ptr
The Capabilities Pointer Register bits adhere to the definitions in the PCI Local Bus
Specification, Revision 2.3. This register provides an offset in this function’s PCI
Configuration Space for the location of the first item in the first Capability list. In the
case of the 4138xx, this is the PCI Express Link Power Management extended capability
as defined by the PCI Bus Power Management Interface Specification, Revision 1.1.
Table 163. ATU Capabilities Pointer Register - ATU_Cap_Ptr
Bit Default Description
07:00 98H
Capability List Pointer - This provides an offset in this function’s configuration space that points to the
4138xx’s PCl Bus Power Management extended capability.
PCI
IOP
Attributes
Attributes
7 4 0
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Internal Bus Address Offset
+034H