Intel CONTROLLERS 413808 - Manual (Page 444)

Intel
®
413808 and 413812—SRAM DMA Unit (SDMA)
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
444 Order Number: 317805-001US
Example 3. Pseudo Code Programming Example: (RedBoot* command line prompts
shown)
To perform a single shot DMA of 0x40 from local SRAM offset 0x0 to host address
0x20_0000:
INITIAL SETUP:
1. Assure the registers are enabled for access by setting bit 0 of the control/status
register.
mfill -b 0xFFD9823c -l 0x4 -p 0x1
2. Unmask SDMA error and status registers in INTCTL2 bits 12 and 13.
TO PERFORM A DMA:
1. Check to make sure that the channel is idle by reading the Int Counter/Ack register
and assuring the upper and lower counts are equal.
x -b 0xFFD98238 -l 0x4 -4
2. Set bit 30 in the byte swap register to disable byte swapping.
mfill -b 0xFFD98200 -l 0x4 -p 0x40000000
3. Set the host destination address lower and upper.
mfill -b 0xFFD98204 -l 0x4 -p 0x200000
mfill -b 0xFFD98208 -l 0x4 -p 0x0
4. Set the source offset from the base of SRAM.
mfill -b 0xFFD9820C -l 0x4 -p 0x0
5. Write the byte counts in both the upper and lower parts of the byte count register.
mfill -b 0xFFD98218 -l 0x4 -p 0x00400040
6. Write the channel go bit (its OK to assure bit 0 is set at the same time).
mfill -b 0xFFD9823c -l 0x4 -p 0x3
7. Read the Int Counter/Ack register.
x -b 0xFFD98238 -l 0x4 -4
8. Assume step 7 resulted in a value of 0x0300002, now write the int counter back to
the int Ack.
mfill -b 0xFFD98238 -l 0x4 -p 0x3
9. Upon INT, check status.
x -b 0xFFD9823c -l 0x4 -4