7 south internal bus events, Table 505. south internal bus initiator events, 504 south internal bus source select summary – Intel CONTROLLERS 413808 User Manual
Page 762: 505 south internal bus initiator events, Pmon, Unit
Intel
®
413808 and 413812—PMON Unit
Intel
®
413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual
October 2007
762
Order Number: 317805-001US
16.5.7.7 South Internal Bus Events
The South Internal Bus has multiple initiators. Some events apply to each requester
unit and the following table represents the Source Select Field values for each unit.
The events and corresponding codes for the South Internal Bus are defined in the
following table. These codes are unique to the IOP programming model of the
PMON
unit.
Table 504. South Internal Bus Source Select Summary
Source
Select Value
Port
0
ATU-E
1
ATU-X
2
Internal Bus Bridge
3
Reserved
4
Reserved
5:7
Reserved
Table 505. South Internal Bus Initiator Events
Event
Selection
Code
Event
SRC Type Comment
880
SIB Addr Acq
Y
D
Address Acquisition Duration
881
SIB Addr Gnt
Y
O
Address Grants Received
882
SIB Data Acq
Y
D
Data Acquisition Duration
883
SIB Data Gnt
Y
O
Data Grants Received
884-887
Reserved
888
SIB Snoop Retry
Y
O
# Transactions which receive a Snoop Retry
889
SIB Coherent Requests
Y
O
# Requests in Coherent Memory (Internal Bus
Bridge only)
88A-88F
Reserved
890
SIB Reads
Y
O
# Read Transactions
891
SIB Read Data
Y
D
# Read Data Cycles (in 16-Bytes)
892 - 89F Reserved
8A0
SIB Writes
Y
O
# Write Transactions
8A1
SIB Write Data
Y
D
# Write Data Cycles (in 16-Bytes)
8A2 - 8FF Reserved