Figure 50. sgpio output od1 signal, Figure 51. sgpio output od2 signal, 50 sgpio output od1 signal – Intel CONTROLLERS 413808 User Manual
Page 464: 51 sgpio output od2 signal, Figure 50, Figure 51, Intel
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Intel
®
413808 and 413812—SGPIO Unit
Intel
®
413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual
October 2007
464
Order Number: 317805-001US
Figure 50. SGPIO Output OD1 Signal
Figure 51. SGPIO Output OD2 Signal
Output Signal ( OD1)
Fixed High
FSENG Status
Programmable Pattern A
Programmable Pattern B
Inverting
Logic
(XOR)
Control bit 6 in SGODSR[0:7]x
Control bits[5:4] in SGODSR [0:7]x
JOG Logic
Control bit 7 in SGODSR[0:7]x
Pre-Conditioning Logic
B6349-01
Output Signal ( OD2)
Fixed High
Reserved
Programmable Pattern A
Programmable Pattern B
Inverting
Logic
(XOR)
Control bit 10 in SGODSR[0:7]x
Control bits[9:8] in SGODSR[0:7]x
JOG Logic
Control bit 11 in SGODSR[0:7]x
Pre-Conditioning Logic
B6350-01
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