5 i2c bus monitor register x - ibmrx, Table 475. i2c bus monitor register x - ibmrx, 475 i – Intel CONTROLLERS 413808 User Manual
Page 721: C bus monitor register x — ibmrx, Table 475. i, The i, C bus is hung and the i, C unit must be reset, C bus interface units—intel, Bit default description
Intel
®
413808 and 413812 I/O Controllers in TPER Mode
October 2007
Developer’s Manual
Order Number: 317805-001US
721
I
2
C Bus Interface Units—Intel
®
413808 and 413812
14.8.5
I
2
C Bus Monitor Register x — IBMRx
The I
2
C Bus Monitor Register (IBMRx) tracks the status of the
SCL
and
SDA
pins. The
values of these pins are recorded in this read-only register so that software may
determine if the I
2
C bus is hung and the I
2
C unit must be reset.
Table 475. I
2
C Bus Monitor Register x — IBMRx
Bit
Default
Description
31:02
0
Reserved
01
1
SCL
Status: This bit continuously reflects the value of the
SCL
pin.
00
1
SDA
Status: This bit continuously reflects the value of the
SDA
pin.
PCI
IOP
Attributes
Attributes
28
24
20
16
12
8
4
0
31
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
rv
na
ro
na
ro
na
Unit #
0
1
2
Attribute Legend:
RV = Reserved
PR = Preserved
RS = Read/Set
RW = Read/Write
RC = Read Clear
RO = Read Only
NA = Not Accessible
Intel XScale
®
processor internal bus address
offset
+2514H
+2534H
+2554H