Intel CONTROLLERS 413808 - Manual (Page 730)

Intel ® 413808 and 413812—PMON Unit
Intel ® 413808 and 413812 I/O Controllers in TPER Mode
Developer’s Manual October 2007
730 Order Number: 317805-001US
16.2.1 Clock Counter Control
When a counter is sampled, the current value of the counter is latched into the
corresponding data register. The command, event, status, and data registers are
accessible via memory mapped registers in order to facilitate high-speed sampling.
Figure 107. Conceptual Diagram of Counter Array
B6297-01